High speed digital (HSD) integrated circuits (ICs) are used in Serializer/Deserializer (SerDes) systems defined at a high data rate with a lossy channel between the transmitter circuit and the receiver circuit. In such systems, the received data stream is severely distorted and requires reconstruction (equalization) before use. For system design, an adaptive Rx continuous time linear equalizer (CTLE) is often needed that adapts to the channel loss characteristics.
This modeling work is typically done by signal integrity (SI) engineers to convert circuits into Input/Output Buffer Information specification (IBIS) models using the IBIS AMI (Algorithmic Modeling Interface) standard to achieve fast simulations for evaluation and performance prediction.
See the full article: Creating_an_Adaptive_AMI_Model.xps
Download the application zip file: AdaptiveCTLE.7z